"Mohammad ALaa" <eng.pirlo@gmail.com> wrote in message <g4lvph$2e8$1@fred.mathworks.com>...
> Hello all
>
> i want to know how i can do the following..
>
> first i want to take data on simulink from virtex-II fpga
> kit, process it and then back to the kit...
>
> how can i do this?? and it is prefered to be through
> ethernet or serial
>
> second how can i transfer data to simulink from ethernet/
> RJ-45??
>
> thanx in advance,
>
> Mohammad ALaa
You can download a free demo of the WebPHY DATABUS IP Core from here:
http://www.webphyfpga.com
The IP core can send and receive data between a FPGA and MATLAB over Ethernet using its web-based "rd" and "wr" commands, wrapped in MATLAB's "urlread" command. The core also has a user-customizable web page allowing browser-based control of the FPGA. The core connects to an Ethernet RJ-45 mag-jack via standard LVDS-configured IOBs on the FPGA. No external PHY or DDR/Flash memory chips, software TCP stack or embedded CPU are required - everything is contained within the core.
> Hello all
>
> i want to know how i can do the following..
>
> first i want to take data on simulink from virtex-II fpga
> kit, process it and then back to the kit...
>
> how can i do this?? and it is prefered to be through
> ethernet or serial
>
> second how can i transfer data to simulink from ethernet/
> RJ-45??
>
> thanx in advance,
>
> Mohammad ALaa
You can download a free demo of the WebPHY DATABUS IP Core from here:
http://www.webphyfpga.com
The IP core can send and receive data between a FPGA and MATLAB over Ethernet using its web-based "rd" and "wr" commands, wrapped in MATLAB's "urlread" command. The core also has a user-customizable web page allowing browser-based control of the FPGA. The core connects to an Ethernet RJ-45 mag-jack via standard LVDS-configured IOBs on the FPGA. No external PHY or DDR/Flash memory chips, software TCP stack or embedded CPU are required - everything is contained within the core.
